Signal Integrity Engineering Director

Signal Integrity Engineering Director

This role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office.

Who We Are:

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work.

We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today's complex world.

Our culture thrives on finding new and better ways to accelerate what's next.

We know varied backgrounds are valued and succeed here.

We have the flexibility to manage our work and personal needs.

We make bold moves, together, and are a force for good.

If you are looking to stretch and grow your career our culture will embrace you.

Open up opportunities with HPE.

Job Description:

Business Unit Employee Value Proposition

The Signal Integrity Engineering Director is a Technical Director that manages team of SI engineers that implements PAM4 SerDes and develops signal integrity rules for hardware networking systems.

Works with teams from HW/SW/PCB layout/Manufacturing Test.

High impact to company for developing new products.

Must be technically proficient with PAM4 SerDes and Signal Integrity Design.

Sounds like you? Then we have the right opportunity for you!

Key Responsibilities:



* Lead team of Signal Integrity engineers working on multiple new programs to implement PAM4 serdes and develop signal integrity rules for HW network systems


* Work constructively with other functions HW, SW, PCB layout and other functions to develop new products


* Respond and resolve Field Escalations and emergency customer escalations


* Work with SI management across geography US/India


* Deliver on time with high quality SI deliverables for new products

Requirements:


* Must have 5+ years managing signal integrity engineers


* Must have knowledge of PAM4 SerDes and Signal Integrity, Clocking, Phase lock Loops


* Must have knowledge of SI CAD tools, HFSS, SiWave, Keysight ADS,


* Must have knowledge of SI lab equipment, DCAX sampling scope, UXR real time scope, VNA, TDR, Signal Source Analyzer for phase noise measurements


* B.S.

Electrical Engineering minimum, M.S.

Electrical Engineering preferred

Knowledge and Skills:


* Good people skills, able to motivate people, good communicator, energetic, self starter, positive


* Team player able to work across geography with SI Director in India and Senior Director in USA


* Knowledge of SI CAD tools, Ansys HFSS, Cadence Allegro, Keysight ADS, Allegro Constraint Manager

Additional Skills:

Accountability, Accountability, Action Planning, Active Learning, Active Listening, Agile Methodology, Agile Scrum Development, Analytical Thinking, Bias, Coaching, Creativity, Critical Thinking, Cross-Functional Teamwork, Data Analysis Management, Data Collection Management (Inac...