Signal Integrity Engineer

Signal Integrity Engineer

This role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office.

Who We Are:

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work.

We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today's complex world.

Our culture thrives on finding new and better ways to accelerate what's next.

We know varied backgrounds are valued and succeed here.

We have the flexibility to manage our work and personal needs.

We make bold moves, together, and are a force for good.

If you are looking to stretch and grow your career our culture will embrace you.

Open up opportunities with HPE.

Job Description:

Work with an experienced signal integrity team with many years of experience performing high speed PAM4 SerDes and system-level signal and power Integrity analysis for cutting edge networking product design.

Team members are industry experts with hands-on experience with high speed PAM4 SerDes, channel analysis, clocking, I/O timing, on-die power integrity, system-level power integrity, CPM model and PDN optimization, PCB design for SI and PI.

They know more than theory.

They know how to take a complex problem and identify the key factors to focus on.

Key Responsibilities:


* Contribute to a team oriented centralized SI organization performing system signal integrity design and state of the art networking products.


* Perform channel margin analysis to provide design trade-offs amongst package, board, and connectors.

Develop PAM4 SerDes channel simulation models and correlate to test structures.


* Perform channel margin analysis and simulation-driven design of high-speed chip-to-chip and board-to-board Links.


* Correlate PAM4 SerDes simulation results with Measurements and work with component and ASIC vendors to improve model accuracy.


* Perform PCB timing analysis, work with board engineers and layout designers to implement all design SI rules, develop and document all layout/SI design rules and checklists.


* PAM4 SerDes parametric tuning to improve design margins of serial links.


* Perform SI DVT measurements on boards and correlate simulations with DVT measurements.

Provide technical assessment of projects to SI management team.

Basic Requirements:


* 4 + years of Signal Integrity analysis experience with a bachelor's degree in Electrical engineering, Computer engineering, Microwave, and/or RF engineering.


* 2 + years of Signal Integrity analysis experience with a master's degree in Electrical engineering, Computer engineering, Microwave, and/or RF engineering.


* 1 + years of Signal Integrity analysis experience with a PhD degree in Electrical engineering, Computer engineering, Microwave, and/or RF engineering.


* Experience with 56G/112G PAM4...